Search - pci fpga

[VHDL-FPGA-Verilog] pci144_vhdl

Description: PCI vhdl for Fpga designer to design PCI IP
Platform: | Size: 3072 | Author: 李晓媛 | Hits:

[VHDL-FPGA-Verilog] Pcit32vhdl

Description: PCI 32 target IP for Fpga/asic Designer
Platform: | Size: 428032 | Author: 李晓媛 | Hits:

[Software Engineering] CorePCIF_AHB_hb

Description: AHB to PCI Structure for FPGA/Asic Designer
Platform: | Size: 525312 | Author: 李晓媛 | Hits:

[VHDL-FPGA-Verilog] pci_express_crc

Description: PCI express CRC rtl core for Fpga/asic Designer
Platform: | Size: 202752 | Author: 李晓媛 | Hits:

[Other] PCIlocalbus

Description: < PCI局部总线开发者指南>>电子版，是pci驱动程序开发的参考资料。-<PCI Local Bus Developer s Guide>> An electronic version is pci driver development reference.
Platform: | Size: 3239936 | Author: 闵君 | Hits:

[Books] BUS_pci

Description: pci总线的资料汇编，对嵌入式初学者很有用-pci bus compilation of information, useful for beginners in embedded
Platform: | Size: 7379968 | Author: 许为 | Hits:

[VHDL-FPGA-Verilog] FPJA2008123

Description: 基于FPGA的PCI接口设计，介绍一种使用PCI宏核逻辑进行的更加简单高效的PCI口设计方法-FPGA-based PCI interface design, the use of PCI macros introduce a nuclear logic more simple and efficient design method of PCI I
Platform: | Size: 111616 | Author: zhp | Hits:

[Software Engineering] PCI_3

Description: ：介绍一种仅使用配置空间设计PCI板卡的方法，使扳卡设计者能比较客易从ISA过渡到 PCI设计，该方法基于FPGA／CPLD，在最小设计模式下，仅使用18个引脚就能实现简易的眦功能卡。-: A configuration space using only PCI card design approach so that designers can compare cards plate off easy transition from ISA to PCI design, the method is based on FPGA/CPLD, the minimum design mode, only use 18-pin canthus can realize simple function card.
Platform: | Size: 109568 | Author: 刘军 | Hits:

[VHDL-FPGA-Verilog] PCIinterfacesourceandtestbenchbasedonFPGA

Description: 基于FPGA的PCI接口源代码及Testbenc-FPGA-based PCI interface source code and Testbenc
Platform: | Size: 467968 | Author: hulin | Hits:

[CSharp] xc2s200pin_out_test

Description: 用于xillinx芯片xc2s200-pq208 PCI引脚测试的，有时担心焊接是否良好，需要测试PCI引脚，也可以修改后测试其它XILLINX芯片，对于想学习CPLD，FPGA的朋友有很大的帮助，可以学习引脚的绑定等等。-Xillinx chip for xc2s200-pq208 PCI pin test, and sometimes worry that welding is good, need to test PCI pin can also be modified to test other XILLINX chips, want to learn for the CPLD, FPGA
Platform: | Size: 283648 | Author: nicai | Hits:

[Books] PCI_KAIFABAODIAN_CD

Description: PCI开发宝典随书配套光盘，有部分源码、原理图、pcb！-PCI Development Baodian book with CD-ROM package, some source code, schematics, pcb!
Platform: | Size: 6036480 | Author: guolh | Hits:

[Other] PCI_User_Manual

Description: The Cyclone® III PCI development board provides a hardware platform for developing and prototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides a high-density of the memory to facilitate the design and development of FPGA designs which need huge memory storage, and also includes Low-Voltage Differential Signaling (LVDS) interface of the High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.-The Cyclone ? III PCI development board provides a hardware platform for developing andprototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides ahigh-density of the memory to facilitate the design and development of FPGA designs which needhuge memory storage, and also includes Low-Voltage Differential Signaling (LVDS) interface ofthe High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.
Platform: | Size: 2132992 | Author: 张治国 | Hits:

[VHDL-FPGA-Verilog] rs1_7seg_pci-0.0.1.tar

Description: Raggedstone1 IP core. Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd. -Raggedstone1 IP core.Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd.
Platform: | Size: 77824 | Author: 张治国 | Hits:

[VHDL-FPGA-Verilog] PCI-IPcoreor1k[1]

Description: PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
Platform: | Size: 1064960 | Author: 李明 | Hits:

[Other] S5933

Description: S5933接口简介 1.结构简介 2、主要引脚信号 3.、后端逻辑电路设计 4.PCI配置 5.PCI总线操作寄存器组 6.ADD-ON总线操作寄存器组 7.总线3总工作方式 8.重要信号时间参数 9.FPGA状态机设计举例-S5933 Interface Introduction 1. Structure Introduction 2, the main pin signal 3., Back-end logic design 4.PCI configuration Register Group 5.PCI bus operation 6.ADD-ON bus operation registers 7. Bus 3, the total work 8. An important signal time parameters For example state machine design 9.FPGA
Platform: | Size: 824320 | Author: wmagic | Hits:

[Software Engineering] pci

Description: pci总线设计在计算机多总线结构中，PCI总线以其速度高、可靠性强、成本低及兼容性好等性能，在各种总线标准中占主导地位，而基于PCI总线标准的接口设计己成为相关项目开发中的优先选择。现阶段PCI总线设计主要采用FPGA现场可编程逻辑阵列来设计，基于FPGA不但能大大缩减电路的体积，提高电路的稳定性，而且其先进的开发工具使整个系统的设计调试周期大大缩短，基于FPGA的PCI总线设计已经成为总线设计的最主要的设计方式。本文提出了一种基于FPGA的PCI接口的简单设计方案，简要介绍了PCI总线的特点、信号、协议与命令，分析了时序设计要点，设计了一种基于FPGA的PCI总线的方案，写出了VHDL程序并进行仿真，仿真结果证明可以成功的进行总线的读写操作。 -pci bus design
Platform: | Size: 900096 | Author: 楠楠 | Hits:

[VHDL-FPGA-Verilog] FPGA_PCI_DATA

Description: 一个基于FPGA的PCI数据发送程序，实现从计算机通过PCI9054向FPGA发送数据功能。开发语言verilog,开发环境quartus-FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment quartusII
Platform: | Size: 236544 | Author: 李国扬 | Hits:

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